김재훈님
larger block flash에 맞게 nand 쪽 드라이버를 수정이 되었는지를 알지 못하겠네요..
죄송하지만 아래 코드는 nand 관련 설정 부분입니다. 지식이 짧은지라 어디를 수정해 줘야 되는지를 정확하게 알지 못하겠네요.... TT
/* NAND configuration */
#define CFG_MAX_NAND_DEVICE     1

#define CFG_NAND_BASE           (0x4e000010)
#define NAND_MAX_FLOORS         1
#define NAND_MAX_CHIPS          1
#define NAND_ChipID_UNKNOWN     0x00
//#define SECTORSIZE            2048
#define SECTORSIZE              1024  <--수정

#define ADDR_COLUMN             1

#define ADDR_PAGE               2
#define ADDR_COLUMN_PAGE        3

#define NAND_DISABLE_CE(nand)           (NFCONT_REG |= (1 << 1))
#define NAND_ENABLE_CE(nand)            (NFCONT_REG &= ~(1 << 1))

#define CFG_NAND_SKIP_BAD_DOT_I         1  /* ".i" read skips bad blocks   */

#define CFG_NAND_WP                     1

#define NAND_WP_OFF()                   do { NFCONT_REG &= ~(1 << 12); } while(0)
#define NAND_WP_ON()                    ;

#define NAND_OOB_SIZE           (64) <--수정
//#define NAND_PAGES_IN_BLOCK     (32)
//#define NAND_PAGE_SIZE          (512)
#define NAND_PAGES_IN_BLOCK     (64) <--수정
#define NAND_PAGE_SIZE          (2048)<--수정



#define NAND_BLOCK_SIZE         (NAND_PAGE_SIZE*NAND_PAGES_IN_BLOCK)
#define NAND_BLOCK_CNT          (4096)
#define NAND_BLOCK_MASK         (NAND_BLOCK_SIZE - 1)
#define NAND_PAGE_MASK          (NAND_PAGE_SIZE - 1)

/* #define NAND_3_ADDR_CYCLE    1 */
/* #define S3C24X0_16BIT_NAND   1 */

/* mark bad block */
#define NF_BB_ON   1
#define NF_BB_OFF  0

/* NAND R/W status */
#define NF_RW_NORMAL   1   /* default */
#define NF_RW_YAFFS    2   /* yaffs image r/w */

/* NAND R/W ECC status */
#define NF_USE_ECC     1
#define NF_USE_MTD_ECC 2


#define CFG_ENV_IS_IN_NAND
#define CFG_ENV_OFFSET 0x0003C000